深圳市宏博通电子有限公司

SN74LVC1G19的技术资料

来源:深圳市宏博通电子有限公司2009/4/16 15:56:53

SN74LVC1G19的产品特征:
* Available in the Texas Instruments
   NanoStar™and NanoFree™Packages
* Supports 5-V VCC Operation
* Inputs Accept Voltages to 5.5 V
* Max tpd of 4 ns at 3.3 V
* Low Power Consumption, 10-µA Max ICC
*±24-mA Output Drive at 3.3 V
* Typical VOLP (Output Ground Bounce)
   <0.8 V at VCC = 3.3 V, TA = 25°C
* Typical VOHV (Output VOH Undershoot)
   >2 V at VCC = 3.3 V, TA = 25°C
* Ioff Supports Partial-Power-Down Mode Operation
* Latch-Up Performance Exceeds 100 mA
   Per JESD 78, Class II
* ESD Protection Exceeds JESD 22
  −  2000-V Human-Body Model (A114-A)
  −  200-V Machine Model (A115-A)
  −  1000-V Charged-Device Model (C101)


SN74LVC1G19的技术参数:
Supply voltage range, VCC. . . . . . . . .. . . . . . . . . −0.5 V to 6.5 V
Input voltage range, VI (see Note 1) . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high-impedance
   or power-off state, VO(see Note 1)  . . . . . . . . .−0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, VO
                  (see Notes 1 and 2) . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0). . . . . . . . .. . . . . . . . . . . −50 mA 
Output clamp current, IOK (VO < 0)  . . . . . . . . .. . . . . . . . −50 mA 
Continuous output current, IO. . . . . . . . . . . . . .. . . . . . . .±50 mA 
Continuous current through VCC or GND. . . . . . . . .. . . . ±100 mA 
Package thermal impedance, θJA (see Note 3):
                                                      DBV package . . . . . . 165°C/W  
                                                      DCK package  . . . . . .259°C/W 
                                                      YEP/YZP package  . . .123°C/W 
Storage temperature range, Tstg . . . . .. . . . . . . −65°C to 150°C



SN74LVC1G19的产品描述:

    This decoder/demultiplexer is designed for 1.65-V to 5.5-V VCC operation.

    The SN74LVC1G19 is a 1-of-2 decoder/demultiplexer. This device buffers the data on input A and passes it to the outputs Y0 (true) and Y1 (complement) when the enable (E) input signal is low.

    This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.